With the prospect of implementing a "2-switch" non-inverting buck boost DC-DC converter, I started to redesign the board, which involves choosing the n channel FETs, and a high/low side driver for them, the Schottky diodes and most importantly the energy storage elements (an inductor and a capacitor).

The inductor and capacitor sizes are calculated from the input and output voltage and the switching frequency. As I have somewhat fixed my sights on a 0v-50v output range, ideally providing 5Amps, I found some formulae online for the requirements, and got a massive surprise! The calculated values were humongous! It turns out that my 244Hz PWM rate was not going to cut it even slightly! Realizing that the switching frequency reduces the storage requirements, I decided that I needed to speed up the PWM time period.

By reducing the PWM "resolution" (ie the number of steps between 0 and 100%) the OC modules can increase the frequency. So instead of using 16 bits of resolution, I switched to 10 bits. This means that each PWM step is a little less than 0.1%, but the frequency jumps up to 15.6kHz which brings the capacitor and inductor back down to much more reasonable levels.